SHS1 Computing · Semester 1 Week 4: Data Storage and Manipulation

Lesson notes

Learning Objectives

Indicator: 1.1.1.LI.4 - Understand and explain the control bus, address bus, data bus and the internal clock, Machine Cycle, Von Neumann architecture (Fetch-Decode-Execute-Store Cycle), instruction set for a CPU, Harvard architecture and embedded systems

By the end of the lesson, learners can:

Define each of the three buses (control, address, and data) and describe the specific role each plays in moving data within a computer.
Explain the function of the internal clock and how it synchronises the operations of the CPU.
Describe the four stages of the machine cycle (Fetch, Decode, Execute, Store) in the correct order and explain what happens at each stage.
Compare the Von Neumann architecture with the Harvard architecture, identifying at least two key differences between them.
Give two examples of embedded systems used in everyday life in Ghana and explain how they rely on computer architecture concepts.

Sign in with your phone number to read the full note and download the GES plan - free.

Sign in with phone number

Curriculum details

Strand: Computer Architecture and Organisation (Strand 1)
Sub-strand: Data Storage and Manipulation (1.1)
Content standard: 1.1.1.CS.1 - Demonstrate knowledge and understanding of data representation and Data Manipulation 1.1.1.LO.1 Apply Computer Architecture concepts related to the design of modern processors, memories, Input and Output to manipulate data.
Indicator: 1.1.1.LI.4 - Understand and explain the control bus, address bus, data bus and the internal clock, Machine Cycle, Von Neumann architecture (Fetch-Decode-Execute-Store Cycle), instruction set for a CPU, Harvard architecture and embedded systems
Suggested placement: Semester 1, Week 4 (Week 4 of the year)
Our suggestion, laid out in curriculum order across three terms of twelve weeks. NaCCA does not fix the week, so follow your school's scheme of learning.
Curriculum reference: NaCCA curriculum document, p. 26

Exemplars (from the NaCCA curriculum)

Group Activity:
- In groups, let learners collaborate and brainstorm on the following components and concepts of Computer Architecture: Control Bus, Address Bus, Data Bus, Internal Clock, Machine Cycle, Von Neumann architecture (Fetch-Decode-Execute-Store Cycle), and Instruction set for CPU.
- Guide the group discussions by providing prompts and questions that encourage in-depth exploration of each component or concept.
- Assess learners based on their ability to articulate the purpose, functioning, and interconnections among these components and concepts, as well as their ability to relate them to data manipulation.
Teaching and Learning Materials:
- * Notepad or exercise book * Pen * Smartphones * Laptops
- * Desktop computers * Tablets * TV and Radio * Open Educational Resources (including YouTube, MOOCs -
- Udemy/Coursera, Khan Academy, and TESSA)
- * The iBox/iCampus (CENDLOS) * Productivity tools ix. Subject-based application software * Instructional Laboratories (with multimedia equipment and smartboards) * Maintenance and repair workshops
Assessment (1.1.1.AS.4). The document marks these depth-of-knowledge levels for this indicator: Level 1 Recall; Level 2 Skills of conceptual understanding.